Микросхема SN74ALS573CDW, Восьмиразрядный регистр с тремя состояниями …

Характеристики

SN74ALS573CDW, Восьмиразрядный регистр с тремя состояниями …The SN74ALS573CDW is an octal transparent D Latch with 3-state outputs. It is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. While the LE input is high, outputs (Q) respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up. A buffered OE input can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pull-up components. OE does not affect internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

• Bus-structured pinout
• True logic outputs
• 3-state Buffer-type outputs drive bus lines directly
• Green product and no Sb/Br